Conference Proceedings

International Conference on Advanced Computing, Communication and Networks - CCN 2011

High throughput-less area efficient fpga implementation of block cipher aes algorithm

Author(s) : D.MAHESH KUMAR, M.SIRIN KUMARI, Y.RAMA DEVI

Abstract

This paper addresses design, hardware implementation and performance testing of AES algorithm. An optimized code for the Rijndael algorithm with 128-bit keys has been developed. The area and throughput are carefully trading off to make it suitable for wireless military communication and mobile telephony where emphasis is on the speed as well as on area of implementation. Keywords: Cryptography, Rijndael, Encryption,Advanced Encryption Standard (AES), pipelining,security, very-large-scale integration (VLSI), VHDL.

Conference Title : International Conference on Advanced Computing, Communication and Networks - CCN 2011
Conference Date(s) : June 2-3, 2011
Place : Hotel Aroma, Chandigarh, India
No fo Author(s) : 3
DOI :
Page(s) : 484 - 489
Electronic ISBN :
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