International Conference on Advances in Computer, Electronics and Electrical Engineering - CEEE 2013
Author(s) : DEEPAK AGARWAL , KIRTISOVA BEHERA , MANOJIT PANDA
As the use and density of memories in electronic circuits is growing more and more, testing of memories and diagnosing various faults present in them are becoming more and more prominent now-a-days. In this paper, two new types of hardware BISD circuits are designed for bit oriented memories. The proposed BISD circuits can not only detect the coupling faults but also locate the address of the victim cell as well as that of the aggressor cell in the presence of a coupling fault. Above all this circuit is very simple, easy to design and is expected to reduce the testing time compared to the software based testing methodologies.