Conference Proceedings

International Conference on Advanced Computing, Communication and Networks - CCN 2011

Implementation of LFSR Counter Using CMOS VLSI Technology

Author(s) : B.PRADEEP, H.DEVANNA, K.VASUDEVA REDDY, M.MAHABOOB BASHA

Abstract

As chip manufacturing technology is suddenly on the threshold of major evaluation, which shrinks chip in size and performance, LFSR (Linear Feedback Shift Register) is implemented in layout level which develops the low power consumption chip, using recent CMOS,sub-micrometer layout tools. Thus LFSR counter can be a new trend setter in cryptography and is also beneficial as compared to GRAY & BINARY counter and variety of other applications. This paper compares 3 architectures in terms of the hardware implementation, CMOS layout and power consumption, using Microwind CMOS layout tool. Thus it provides solution to a low power architecture implementation of LFSR in CMOSVLSI.

Conference Title : International Conference on Advanced Computing, Communication and Networks - CCN 2011
Conference Date(s) : June 2-3, 2011
Place : Hotel Aroma, Chandigarh, India
No fo Author(s) : 4
DOI :
Page(s) : 24 - 28
Electronic ISBN :
Views : 822   |   Download(s) : 151