Conference Proceedings

International Conference on Advances in Electronics and Electrical Engineering - AEEE 2012

Hybrid AES-DES Block Cipher: Implementation using Xilinx ISE 9.1i

Author(s) : ANURHEA DUTTA, PRERNA BHARTI, SUREKHA K S, SWATI AGRAWAL

Abstract

In this era of information, need for protection of data is more pronounced than ever. Secure communication is necessary to protect sensitive information in military and government institutions as well as private individuals. Current encryption standards are used to encrypt and protect data not only during transmission but storage as well. Data Encryption Standard was introduced in early 1970s as a standard cryptographic algorithm to protect data. However, due to its short 56-bit key length, simple brute force attacks cracked it in less than 10 hrs. Another disadvantage was also the possibility of weak and semi weak keys. In the year 2000, Rijndael Encryption algorithm or AES was chosen by National Institite of Standards and Technology(NIST) to be adopted by the U.S. Government as the new Encryption standard to replace the outdated and easily crackable DES. The major advantage lay in the non-linearity of the key-schedule which eliminated the possibility of weak and semi weak keys. This encryption algorithm is virtually crack-proof till date but research has concluded that side channel attacks can be a concern if the encryption and crack are running on the same server. In this paper we introduce the concept of hybridizing the AES and DES standards. The name “Hybrid” implies that this encryption algorithm has built in features which have been inherited from either of the constituent standards. The AES standard has been incorporated into each fiestal round of DES thereby reinforcing the DES architecture as well as giving rise to much more secure encryption algorithm. The 256-bit block cipher uses 128-bit cipher key adopted from the AES key schedule and incorporates 10 rounds. This design has been implemented in VHDL using Xilinx ISE 9.1i platform and targeted on a XILINX XC3S400 based FPGA technology.

Conference Title : International Conference on Advances in Electronics and Electrical Engineering - AEEE 2012
Conference Date(s) : June 23, 2012
Place : Hotel Lebua at State Tower, Bangkok, Thailand
No fo Author(s) : 4
DOI : 10.15224/978-981-07-2683-6-101
Page(s) : 1 - 5
Electronic ISBN : 978-981-07-2683-6
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